The fact that other code use the technique does not make it
elegant.
I think we are going to have to agree to disagree on this.
PS: Oh - and don't expect the "problem" to become
less probably on newer systems - the cache coherency
of x86/x86-64 is rather unique, RISC systems does not
have it, and Intel is talking about dropping it for
far out future systems
(http://www.itworld.com/hardware/128338/intel-1000-core-processor-possible).
That's interesting. I'm vaguely familiar with message passing systems.
Message passing is not new, I did work briefly on one lo these many
years ago.
My understanding is that there are two types of synchronization --
shared memory, and message passing. Java's monitors are a shared memory
design. I'm not sure what it would take to get a monitor in Java to run
on a message passing system. And the rest of the Java memory model might
be impossible to port.
Anyway, good info, but unlikely to affect the Java world, which is
shared memory only afaict.
systems without cache coherency, so it will survive fine.